Presentation 2008-03-07
New design technology of independent-gate controlled Double-Gate transistor for systemu LSI
Yu Hiroshima, Keisuke Okamoto, Keisuke Koizumi, Shigeyoshi Watanabe,
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Abstract(in English) New design technology of independent-gate controlled Double-Gate transistor realized high density design more than FinFET is proposed. Using New design technology of independent-gate controlled Double-Gate transistor, pattern area of system LSI designed by cell library can be reduced to 48% compared with that using planar MOSFET.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Independent-gate controlled Double-Gate transistor / FinFET / system LSI
Paper # VLD2007-168,ICD2007-191
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Conference Information
Committee VLD
Conference Date 2008/2/29(1days)
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Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) New design technology of independent-gate controlled Double-Gate transistor for systemu LSI
Sub Title (in English)
Keyword(1) Independent-gate controlled Double-Gate transistor
Keyword(2) FinFET
Keyword(3) system LSI
1st Author's Name Yu Hiroshima
1st Author's Affiliation Department of Information Science, Shonan Institute of Technology()
2nd Author's Name Keisuke Okamoto
2nd Author's Affiliation Department of Information Science, Shonan Institute of Technology
3rd Author's Name Keisuke Koizumi
3rd Author's Affiliation Department of Information Science, Shonan Institute of Technology
4th Author's Name Shigeyoshi Watanabe
4th Author's Affiliation Department of Information Science, Shonan Institute of Technology
Date 2008-03-07
Paper # VLD2007-168,ICD2007-191
Volume (vol) vol.107
Number (no) 508
Page pp.pp.-
#Pages 6
Date of Issue