| Presentation | 2008-03-07 Implementation and Evaluation of Network Security using An Embedded Programmable Logic Matrix (ePLX) Mitsutaka Matsumoto, Shun Kimura, Hirofumi Nakano, Takenobu Iwao, Yoshihiro Okuno, Kazutami Arimoto, Tomonori Izumi, Takeshi Fujino, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Low Cost Network Appliance with low power microprocessor must be connected with networks in order to realize ubiquitous network, Network security have to be considered for these appliances. The encryption processing and string matching are heavy transaction for the microprocessors, which is used low-cost, low-power Appliances. Hence, data transmission speeds is greatly decreased because of the low-performance in software processing. In order to improve device performance, we propose ePLX adapted for network security transactions. In this paper, we explain the ePLX architecture and network application examples, which are installation and evaluation of Simplified DES encryption circuit, and approach to realize string matching for Intrusion Detect System (IDS). Evaluation Results of these circuits on Test chip and comparison between ePLX and software, are shown in this paper. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | programmable device / Simplified DES Encryption / string matching |
| Paper # | VLD2007-165,ICD2007-188 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2008/2/29(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation and Evaluation of Network Security using An Embedded Programmable Logic Matrix (ePLX) |
| Sub Title (in English) | |
| Keyword(1) | programmable device |
| Keyword(2) | Simplified DES Encryption |
| Keyword(3) | string matching |
| 1st Author's Name | Mitsutaka Matsumoto |
| 1st Author's Affiliation | Graduate school of Science and Engineering, Ritsumeikan University() |
| 2nd Author's Name | Shun Kimura |
| 2nd Author's Affiliation | Graduate school of Science and Engineering, Ritsumeikan University |
| 3rd Author's Name | Hirofumi Nakano |
| 3rd Author's Affiliation | Renesas Technology Corp. |
| 4th Author's Name | Takenobu Iwao |
| 4th Author's Affiliation | Renesas Technology Corp. |
| 5th Author's Name | Yoshihiro Okuno |
| 5th Author's Affiliation | Renesas Technology Corp. |
| 6th Author's Name | Kazutami Arimoto |
| 6th Author's Affiliation | Renesas Technology Corp. |
| 7th Author's Name | Tomonori Izumi |
| 7th Author's Affiliation | Graduate school of Science and Engineering, Ritsumeikan University |
| 8th Author's Name | Takeshi Fujino |
| 8th Author's Affiliation | Graduate school of Science and Engineering, Ritsumeikan University |
| Date | 2008-03-07 |
| Paper # | VLD2007-165,ICD2007-188 |
| Volume (vol) | vol.107 |
| Number (no) | 508 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |