| Presentation | 2008-03-05 Minimizing Minimum Delay Compensations in Datapath Synthesis Keisuke INOUE, Mineo KANEKO, Tsuyoshi IWAGAKI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As the feature size of VLSI becomes smaller, delay variations become a serious problem in VLSI design. The "setup" timing constraint can be fulfilled by choosing a clock period appropriately, while the "hold" timing constraint can not, and in many cases, the hold constraint becomes critical for a correct latch of a signal under delay variations. An approach to ensure the hold constraint under delay variations is to enlarge the minimum path delay between registers. It can be done by inserting delay elements on non-critical paths mainly in a functional unit. We call it "minimum path delay compensation" in this paper. The RT-level optimization problem to minimize the number of functional units which require minimum path delay compensation in datapath synthesis has been proposed, and its NP-hardness has been shown. For this problem, we propose two new methods, one is based on integer linear programming (ILP), the other is based on heuristic. We evaluate their performance by computational experiments. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Datapath synthesis / register assignment / delay variation / minimum delay compensation |
| Paper # | VLD2007-140,ICD2007-163 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2008/2/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Minimizing Minimum Delay Compensations in Datapath Synthesis |
| Sub Title (in English) | |
| Keyword(1) | Datapath synthesis |
| Keyword(2) | register assignment |
| Keyword(3) | delay variation |
| Keyword(4) | minimum delay compensation |
| 1st Author's Name | Keisuke INOUE |
| 1st Author's Affiliation | School of Information Science, Japan Advanced Institute of Science and Technology() |
| 2nd Author's Name | Mineo KANEKO |
| 2nd Author's Affiliation | School of Information Science, Japan Advanced Institute of Science and Technology |
| 3rd Author's Name | Tsuyoshi IWAGAKI |
| 3rd Author's Affiliation | School of Information Science, Japan Advanced Institute of Science and Technology |
| Date | 2008-03-05 |
| Paper # | VLD2007-140,ICD2007-163 |
| Volume (vol) | vol.107 |
| Number (no) | 506 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |