| Presentation | 2008-03-05 Task Scheduling Technique for Mitigating SEU Vulnerability of Heterogeneous Multiprocessor Systems Makoto SUGIHARA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Utilizing a heterogeneous multiprocessor system has become a popular design paradigm to build an embedded system at a cheap cost within short development time. A reliability issue for embedded systems, which is vulnerability to single event upsets (SEUs), has become a matter of concern as technology proceeds. This paper presents robustness of heterogeneous multiprocessors to SEUs and proposes task scheduling for minimizing SEU vulnerability of them. This paper experimentally shows that increasing performance of a CPU core deteriorates its reliability. Based on the experimental observation, we propose task scheduling for reducing SEU vulnerability of a heterogeneous multiprocessor system. The experimental results demonstrate that our task scheduling technique can reduce much of SEU vulnerability under real-time constraints. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Single Event Upset / Soft Error / Reliability / Performance / Vulnerability / Cache Memory / Task Scheduling / Heterogeneous Multiprocessor / Embedded System |
| Paper # | VLD2007-138,ICD2007-161 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2008/2/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Task Scheduling Technique for Mitigating SEU Vulnerability of Heterogeneous Multiprocessor Systems |
| Sub Title (in English) | |
| Keyword(1) | Single Event Upset |
| Keyword(2) | Soft Error |
| Keyword(3) | Reliability |
| Keyword(4) | Performance |
| Keyword(5) | Vulnerability |
| Keyword(6) | Cache Memory |
| Keyword(7) | Task Scheduling |
| Keyword(8) | Heterogeneous Multiprocessor |
| Keyword(9) | Embedded System |
| 1st Author's Name | Makoto SUGIHARA |
| 1st Author's Affiliation | Toyohashi University of Technology:Japan Science and Technology Agency() |
| Date | 2008-03-05 |
| Paper # | VLD2007-138,ICD2007-161 |
| Volume (vol) | vol.107 |
| Number (no) | 506 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |