| Presentation | 2008-03-07 Reliable Transmission of PAPR Reduction Patterns for MIMO-OFDM and its FPGA On-Board System Simulator Shogo HAGIWARA, Satoshi SUYAMA, Hiroshi SUZUKI, Kazuhiko FUKAWA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 2×2 MIMO-OFDM transmission simulator employing subcarrier block phase hopping (SBPH) is implemented in FPGA logic. SBPH can improve frequency diversity effect of channel coding while simultaneously reducing peak to average power ratios (PAPRs) of transmitted signals. Since the receiver for MIMO-OFDM with SBPH needs to detect how the transmitter rotates phases of the subcarriers, this report investigates two methods for transmission and detection of the phase pattern in 2×2 MIMO-OFDM. One is to transmit the phase pattern signal by the frequency division multiplexing (FDM) and to detect it using the maximal ratio combining (MRC), which requires low complexity. The other is to transmit the phase pattern signal by the space division multiplexing (SDM) and to detect it using the maximum likelihood detection (MLD), which can perform reliable detection. Computer simulations demonstrate that SDM-MLD is superior in detection reliability, and thus it is implemented on an FPGA board. This report clarifies a circuit size of the implemented phase-pattern detection module and evaluates how fast clock frequency the simulator can operate up to. The FPGA on-board simulator can realize 430 Mbps real-time signal transmission with a frequency band of 80MHz, a modulation scheme of 64 QAM, and coding rate of 3/4, and can achieve almost the same receiver performance as a computer simulation shows. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Mobile communication / MIMO-OFDM / phase hopping / PAPR / phase pattern detection / FPGA |
| Paper # | RCS2007-237 |
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| Conference Information | |
| Committee | RCS |
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| Conference Date | 2008/2/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Radio Communication Systems (RCS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Reliable Transmission of PAPR Reduction Patterns for MIMO-OFDM and its FPGA On-Board System Simulator |
| Sub Title (in English) | |
| Keyword(1) | Mobile communication |
| Keyword(2) | MIMO-OFDM |
| Keyword(3) | phase hopping |
| Keyword(4) | PAPR |
| Keyword(5) | phase pattern detection |
| Keyword(6) | FPGA |
| 1st Author's Name | Shogo HAGIWARA |
| 1st Author's Affiliation | Tokyo Institute of Technology() |
| 2nd Author's Name | Satoshi SUYAMA |
| 2nd Author's Affiliation | Tokyo Institute of Technology |
| 3rd Author's Name | Hiroshi SUZUKI |
| 3rd Author's Affiliation | Tokyo Institute of Technology |
| 4th Author's Name | Kazuhiko FUKAWA |
| 4th Author's Affiliation | Tokyo Institute of Technology |
| Date | 2008-03-07 |
| Paper # | RCS2007-237 |
| Volume (vol) | vol.107 |
| Number (no) | 518 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |