| Presentation | 2008/2/1 Wafer-Level-Packaging Inductor with Extremely High Quality Factor and its Application to 5.8GHz LC-type Voltage Controlled Oscillator Hideki HATAKEYAMA, Kenichi OKADA, Kazuma OHASHI, Yusaku ITO, Yusuke UEMICHI, Naoyuki OZAWA, Masakazu SATO, Takuya AIZAWA, Tatsuya ITO, Ryozo YAMAUCHI, Kazuya MASU, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose a stacked-chip SiP technique, where a high quality-factor (Q) inductor chip fabricated using a Wafer Level Package (WLP) process is flipped and stacked on an LC-type Voltage Controlled Oscillator (LC-VCO) circuit chip. The phase noise of this device is -119dBc/Hz at a 1MHz offset for a 5.84GHz carrier frequency and the frequency tuning range is 5.73GHz-5.95GHz. Power consumption is 1.93mW and the Figure of Merit (FoM) is -192dBc/Hz. The designed and fabricated LC-VCO stacked with the WLP inductor has enough characteristics for the application of 5GHz wireless communication systems. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Wafer Level Package / Inductor / Voltage Controlled Oscillator |
| Paper # | SDM2007-272 |
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| Committee | SDM |
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| Conference Date | 2008/2/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Wafer-Level-Packaging Inductor with Extremely High Quality Factor and its Application to 5.8GHz LC-type Voltage Controlled Oscillator |
| Sub Title (in English) | |
| Keyword(1) | Wafer Level Package |
| Keyword(2) | Inductor |
| Keyword(3) | Voltage Controlled Oscillator |
| 1st Author's Name | Hideki HATAKEYAMA |
| 1st Author's Affiliation | Integrated Research Institute, Tokyo Institute of Technology:Electron Device Laboratory, Fujikura Ltd() |
| 2nd Author's Name | Kenichi OKADA |
| 2nd Author's Affiliation | Integrated Research Institute, Tokyo Institute of Technology |
| 3rd Author's Name | Kazuma OHASHI |
| 3rd Author's Affiliation | Integrated Research Institute, Tokyo Institute of Technology |
| 4th Author's Name | Yusaku ITO |
| 4th Author's Affiliation | Integrated Research Institute, Tokyo Institute of Technology |
| 5th Author's Name | Yusuke UEMICHI |
| 5th Author's Affiliation | Electron Device Laboratory, Fujikura Ltd |
| 6th Author's Name | Naoyuki OZAWA |
| 6th Author's Affiliation | Electron Device Laboratory, Fujikura Ltd |
| 7th Author's Name | Masakazu SATO |
| 7th Author's Affiliation | Electron Device Laboratory, Fujikura Ltd |
| 8th Author's Name | Takuya AIZAWA |
| 8th Author's Affiliation | Electron Device Laboratory, Fujikura Ltd |
| 9th Author's Name | Tatsuya ITO |
| 9th Author's Affiliation | Electron Device Laboratory, Fujikura Ltd |
| 10th Author's Name | Ryozo YAMAUCHI |
| 10th Author's Affiliation | Fujikura Ltd |
| 11th Author's Name | Kazuya MASU |
| 11th Author's Affiliation | Integrated Research Institute, Tokyo Institute of Technology |
| Date | 2008/2/1 |
| Paper # | SDM2007-272 |
| Volume (vol) | vol.107 |
| Number (no) | 481 |
| Page | pp.pp.- |
| #Pages | 4 |
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