| Presentation | 2008/2/1 Three-Dimensional Integration Technology Based on Wafer-on-Wafer Bonding Technique with Self-Assembly Takafumi FUKUSHIMA, Tetsu TANAKA, Mitsumasa KOYANAGI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The increases of signal propagation delay and power consumption by interconnections in LSIs make it difficult to achieve a high performance LSI with low power consumption. To solve such interconnection problem, we have developed a three-dimensional (3D) integration technology based on wafer bonding method. We can reduce the pin capacitances and the wiring length by using this 3D integration technology. Therefore, we can increase the signal processing speed and decrease the power consumption. We have fabricated several prototype 3D LSI chips such as image sensor chip, shared memory, artificial retina chip, and microprocessor chip using this technology. In the wafer-on-wafer 3D integration technology, however, the overall chip yield exponentially decreases with an increase in the number of stacked layers. To solve such problem, we have proposed a new super-chip integration technology based on the reconfigured wafer-on-wafer bonding. Many chips are simultaneously aligned and bonded onto lower chips with high alignment accuracy using a self-assembly technique in a super-chip integration technology. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Three-Dimensional (3D) LSI / wafer bonding / self-organization / self-assembly |
| Paper # | SDM2007-271 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2008/2/1(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Three-Dimensional Integration Technology Based on Wafer-on-Wafer Bonding Technique with Self-Assembly |
| Sub Title (in English) | |
| Keyword(1) | Three-Dimensional (3D) LSI |
| Keyword(2) | wafer bonding |
| Keyword(3) | self-organization |
| Keyword(4) | self-assembly |
| 1st Author's Name | Takafumi FUKUSHIMA |
| 1st Author's Affiliation | Department of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University() |
| 2nd Author's Name | Tetsu TANAKA |
| 2nd Author's Affiliation | Department of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University |
| 3rd Author's Name | Mitsumasa KOYANAGI |
| 3rd Author's Affiliation | Department of Bioengineering and Robotics, Graduate School of Engineering, Tohoku University |
| Date | 2008/2/1 |
| Paper # | SDM2007-271 |
| Volume (vol) | vol.107 |
| Number (no) | 481 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |