Presentation 2008-06-26
A Consideration on Usage of CAD Tools : From Timing Analysis
Shuji TSUKIYAMA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) The design of integrated circuits consists of several phases, and for each phase, various Computer-Aided Design (CAD) tools are devised and used. These CAD tools can be divided into two types; analysis tools and synthesis tools. Since the ultimate goal of design is fabrication, we can see an aspect of issues of using CAD tools if we consider analysis tools from view points of synthesis tools. In this talk, we take a close look at two analysis tools such as the interconnect delay estimation and the statistical STA (static timing analysis), and consider what we must care in proper use of CAD tools and what we must do to let CAD users use tools properly.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) CAD tools / Proper use / Analysis tools / Synthesis tools / Interconnect delay estimation / Statistical STA
Paper # CAS2008-18,VLD2008-31,SIP2008-52
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Committee CAS
Conference Date 2008/6/19(1days)
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Paper Information
Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Consideration on Usage of CAD Tools : From Timing Analysis
Sub Title (in English)
Keyword(1) CAD tools
Keyword(2) Proper use
Keyword(3) Analysis tools
Keyword(4) Synthesis tools
Keyword(5) Interconnect delay estimation
Keyword(6) Statistical STA
1st Author's Name Shuji TSUKIYAMA
1st Author's Affiliation Department of Electrical, Electronic, and Communication Engineering, Chuo University()
Date 2008-06-26
Paper # CAS2008-18,VLD2008-31,SIP2008-52
Volume (vol) vol.108
Number (no) 104
Page pp.pp.-
#Pages 4
Date of Issue