Presentation 2008-02-08
RTL False Path Identification Using High Level Synthesis Information
Naotsugu IKEDA, Satoshi OHTAKE, Michiko INOUE, Hideo FUJIWARA,
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Abstract(in English) This paper proposes a method of RTL false path identification using high level synthesis information. By using the false path information, we can not only facilitate process of test generation and test application but also avoid over testing. This paper is based on the non-robust test, which is widely supported in current ATPG systems for path delay faults, to identify false paths. We regard the paths that have neither robust nor non-robust testable path delay fault as false paths. In this work, we identify false paths in an RTL circuit by using Input-Output (I/O) dependence graphs which indicate a relation between the behavioral description which is input of high level synthesis and the RTL circuit which is output of high level synthesis. In this work, we deal with all the RTL paths in a circuit including paths that cannot be handled by our previous method. Experimental results show the effectiveness of the proposed method.
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Keyword(in English) RTL false path / path delay fault / high level synthesis / non-robust sensitization
Paper # DC2007-77
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Committee DC
Conference Date 2008/2/1(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) RTL False Path Identification Using High Level Synthesis Information
Sub Title (in English)
Keyword(1) RTL false path
Keyword(2) path delay fault
Keyword(3) high level synthesis
Keyword(4) non-robust sensitization
1st Author's Name Naotsugu IKEDA
1st Author's Affiliation Graduate School of Information Science Nara Institute of Science and Technology()
2nd Author's Name Satoshi OHTAKE
2nd Author's Affiliation Graduate School of Information Science Nara Institute of Science and Technology
3rd Author's Name Michiko INOUE
3rd Author's Affiliation Graduate School of Information Science Nara Institute of Science and Technology
4th Author's Name Hideo FUJIWARA
4th Author's Affiliation Graduate School of Information Science Nara Institute of Science and Technology
Date 2008-02-08
Paper # DC2007-77
Volume (vol) vol.107
Number (no) 482
Page pp.pp.-
#Pages 6
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