Presentation | 2008-03-07 A Proposal of Hierarchical Adaptive FEC for TDM PWE3 over PSN Zhenlong CUI, MASAKI Umayabashi, Kazuo TAKAGI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In this paper, authors propose a Hierarchical Adaptive FEC method satisfying both requirements of high transmission efficiency and low delay variation for TDM link emulation in the packet switch network (PSN). To achieve transmission efficiency, link-by-link FEC processing is more effective than end-to-end one. In contrast, to achieve low delay variation, end-to-end FEC processing is much suitable rather than link-by-link one. The conventional approaches are, therefore, difficult to satisfy them. In our method, the ingress edge run FEC encoding, and then sends TDM packets and their redundant packets as one FEC block. The intermediate switches run the FEC encoding only. They construct a new hierarchical FEC block adding redundant packets to the received FEC block only when detecting the packet loss based on the FEC encoding result. The egress edge runs the FEC decoding to recover all of the lost packets on the TDM emulated link. Because of not running the FEC decoding, the intermediate switches do not store the packets and not recover the lost packets, such as end-to-end FEC approach, so that delay variation does not cause in the PSN. In addition, redundant packets for a link is only required, such as link-by-link FEC one. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | FEC / PWE / loss / recovery |
Paper # | NS2007-179 |
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Committee | NS |
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Conference Date | 2008/2/28(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Network Systems(NS) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Proposal of Hierarchical Adaptive FEC for TDM PWE3 over PSN |
Sub Title (in English) | |
Keyword(1) | FEC |
Keyword(2) | PWE |
Keyword(3) | loss |
Keyword(4) | recovery |
1st Author's Name | Zhenlong CUI |
1st Author's Affiliation | System Platforms Research Labs, NEC Corporation() |
2nd Author's Name | MASAKI Umayabashi |
2nd Author's Affiliation | System Platforms Research Labs, NEC Corporation |
3rd Author's Name | Kazuo TAKAGI |
3rd Author's Affiliation | System Platforms Research Labs, NEC Corporation |
Date | 2008-03-07 |
Paper # | NS2007-179 |
Volume (vol) | vol.107 |
Number (no) | 524 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |