Presentation 2008-02-29
Security evaluation of Enocoro-128 ver.1.1 against resynchronization attack
Kei KONOSU, Kenichiro MUTO, Hiroki FURUICHI, Dai WATANABE, Toshinobu KANEKO,
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Abstract(in English) Enocoro is a pseudorandom number generator for a stream cipher proposed by Hitachi, Ltd at ISEC in September, 2007. In this paper, we evaluate the strength of a revised version of Enocoro-128 (Enocoro-128 ver.1.1), proposed at SCIS 2008, against resynchronization attack. We consider linear/differential characteristic as the correlation of IV and keystream, by evaluating maximum linear/differential characteristic probability by truncated linear/differential cryptanalysis. Using Viterbi algorithm, we search for the truncated path with minimum number of active sboxes as strength evaluation. As a result, the maximum linear characteristic probability of Enocoro-128 ver.1.1 is 2^<-216> and the maximum differential characteristic probability of Enocoro-128 ver.1.1 is 2^<-177.8>. Thus, it is shown that Enocoro-128 ver.1.1 has enough strength against linear/differential resynchronization attack.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Enocoro / Stream cipher / Resynchronization attack / Linear cryptanalysis / Differential cryptanalysis / Truncated cryptanalysis
Paper # IT2007-50,ISEC2007-147,WBS2007-81
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Committee ISEC
Conference Date 2008/2/22(1days)
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Registration To Information Security (ISEC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Security evaluation of Enocoro-128 ver.1.1 against resynchronization attack
Sub Title (in English)
Keyword(1) Enocoro
Keyword(2) Stream cipher
Keyword(3) Resynchronization attack
Keyword(4) Linear cryptanalysis
Keyword(5) Differential cryptanalysis
Keyword(6) Truncated cryptanalysis
1st Author's Name Kei KONOSU
1st Author's Affiliation Department of Electrical Engineering, Faculty of Science and Technology, Tokyo University of Science()
2nd Author's Name Kenichiro MUTO
2nd Author's Affiliation Department of Electrical Engineering, Faculty of Science and Technology, Tokyo University of Science
3rd Author's Name Hiroki FURUICHI
3rd Author's Affiliation Department of Electrical Engineering, Faculty of Science and Technology, Tokyo University of Science
4th Author's Name Dai WATANABE
4th Author's Affiliation Systems Development Laboratory, Hitachi, Ltd.
5th Author's Name Toshinobu KANEKO
5th Author's Affiliation Department of Electrical Engineering, Faculty of Science and Technology, Tokyo University of Science
Date 2008-02-29
Paper # IT2007-50,ISEC2007-147,WBS2007-81
Volume (vol) vol.107
Number (no) 501
Page pp.pp.-
#Pages 7
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