Presentation 2008-05-16
Reconsideration on Algorithmic Tamper Proof Devices using PIN (part2)
Yuichi KOMANO, Kazuo OHTA, Hideyuki MIYAKE, Atsushi SHIMBO,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Gennaro et al. discussed the algorithmic tamper proof (ATP) devices using the personal identification number (PIN); and proposed counter units which number the amount of wrong attempts in user authentication. At SCIS 2008, we proposed another unit which numbers the amount of consecutive wrong attempts; however, which requires the expensive memory area (both read-proof and tamper-proof area). In this report, we give two constructions of counter unit which number the amount of consecutive wrong attempts and have no use for such expensive memory area. Note that the security of them can be ensured by estimating the success probability of specific but exhaustive attacks.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Algorithmic Tamper Proof (ATP) / Authentication / PIN / Counter Unit / Chameleon Hash Function
Paper # ISEC2008-7
Date of Issue

Conference Information
Committee ISEC
Conference Date 2008/5/9(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Information Security (ISEC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Reconsideration on Algorithmic Tamper Proof Devices using PIN (part2)
Sub Title (in English)
Keyword(1) Algorithmic Tamper Proof (ATP)
Keyword(2) Authentication
Keyword(3) PIN
Keyword(4) Counter Unit
Keyword(5) Chameleon Hash Function
1st Author's Name Yuichi KOMANO
1st Author's Affiliation Computer & Network Systems Laboratory, Corporate Research & Development Center, Toshiba Corporation()
2nd Author's Name Kazuo OHTA
2nd Author's Affiliation Department of Information and Communication Engineering, The University of Electro-Communications
3rd Author's Name Hideyuki MIYAKE
3rd Author's Affiliation Computer & Network Systems Laboratory, Corporate Research & Development Center, Toshiba Corporation
4th Author's Name Atsushi SHIMBO
4th Author's Affiliation Computer & Network Systems Laboratory, Corporate Research & Development Center, Toshiba Corporation
Date 2008-05-16
Paper # ISEC2008-7
Volume (vol) vol.108
Number (no) 38
Page pp.pp.-
#Pages 6
Date of Issue