Presentation 2008-04-23
Influence of Untestable Hard Error on Soft Error Hardened Latches
Kengo NAKASHIMA, Kazuteru NAMBA, Hideo ITO,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) In recent high-density, high-speed and low-power VLSIs, soft errors frequently occur, and soft error hardened design becomes essential. Soft error hardened latches were proposed as one of techniques correcting soft errors occurring on latches in VLSI systems. Some manufacturing faults occurring on the soft error hardened latches are untestable. Even if such faults occur, the latches work correctly as long as no soft errors occur. However, the faulty latches may have only lower soft error correcting copability than fault-free latches. This paper provides an analysis of soft error correcting capability of soft error hardened latches that untestable manufacturing open and short faults occur. On soft error hardened latches that open and short fault occur, uncorrectable soft errors occur 8.663×10^<-17> and 9.789×10^<-17>times per an hour, respectively. The probability that uncorrectable soft errors occur on faulty circuits with soft error hardened latches is 10^<-4>~10^<-5>times lower than one that softerrors occur on fault-free circuits without soft error hardened latches.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Soft Error / Latch / Soft Error Rate / Open Fault / Short Fault
Paper # CPSY2008-8,DC2008-8
Date of Issue

Conference Information
Committee DC
Conference Date 2008/4/16(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Influence of Untestable Hard Error on Soft Error Hardened Latches
Sub Title (in English)
Keyword(1) Soft Error
Keyword(2) Latch
Keyword(3) Soft Error Rate
Keyword(4) Open Fault
Keyword(5) Short Fault
1st Author's Name Kengo NAKASHIMA
1st Author's Affiliation Graduate School of Advanced Integration Science, Chiba University()
2nd Author's Name Kazuteru NAMBA
2nd Author's Affiliation Graduate School of Advanced Integration Science, Chiba University
3rd Author's Name Hideo ITO
3rd Author's Affiliation Graduate School of Advanced Integration Science, Chiba University
Date 2008-04-23
Paper # CPSY2008-8,DC2008-8
Volume (vol) vol.108
Number (no) 15
Page pp.pp.-
#Pages 6
Date of Issue