Presentation | 2008-01-17 A Tile Based Dynamically Reconfigurable Architecture with Dual ALU-array/RISC Processor Operating Mode Capability Shin'ichi KOUYAMA, Masayuki HIROMORO, Hiroyuki OCHI, Yukihiro NAKAMURA, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | ALU-based coarse-grained reconfigurable devices are suitable for parallel word-wise processing. However, they are not efficiently used for sequential processing with complicated controls. In this study, we propose a tile based dynamically reconfigurable architecture with dual ALU-array/RISC processor operating mode capability, in order to achieve performance improvement by changing operating mode of the device according to characteristics of target applications. The proposed device consists of an array of the basic element "tile." Each "tile" operates either as a 16-bit integer RISC processor or as ALU-based hardware accelerator. This paper shows the architecture of the device and a result of its implementation. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | reconfigurable device / coarse-grained / ALU-array / softcore processor |
Paper # | VLD2007-128,CPSY2007-71,RECONF2007-74 |
Date of Issue |
Conference Information | |
Committee | RECONF |
---|---|
Conference Date | 2008/1/10(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Reconfigurable Systems (RECONF) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Tile Based Dynamically Reconfigurable Architecture with Dual ALU-array/RISC Processor Operating Mode Capability |
Sub Title (in English) | |
Keyword(1) | reconfigurable device |
Keyword(2) | coarse-grained |
Keyword(3) | ALU-array |
Keyword(4) | softcore processor |
1st Author's Name | Shin'ichi KOUYAMA |
1st Author's Affiliation | Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ.() |
2nd Author's Name | Masayuki HIROMORO |
2nd Author's Affiliation | Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ. |
3rd Author's Name | Hiroyuki OCHI |
3rd Author's Affiliation | Dept. of Communications and Computer Eng., Graduate School of Informatics, Kyoto Univ. |
4th Author's Name | Yukihiro NAKAMURA |
4th Author's Affiliation | Research Organization of Science and Engineering, Ritsumeikan Univ. |
Date | 2008-01-17 |
Paper # | VLD2007-128,CPSY2007-71,RECONF2007-74 |
Volume (vol) | vol.107 |
Number (no) | 419 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |