Presentation 2008-01-17
An effective data I/O mechanism utilizing FIFOs for an array processor
Yuusuke NOMOTO, Yuka SATO, Toshiaki MIYAZAKI,
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Abstract(in English) Data I/O management is very important to handle huge data effectively in signal and image processing with array processors. In this paper, we propose an effective data I/O architecture utilizing FIFOs tuned to an array processor. Several FIFOs are provided to store initial matrix data and partially processed results. By switching the FIFOs promptly and transferring data from (to) them to (from) the array processor, we can eliminate the data transfer itself between the external memory and the array processor, which often becomes a performance bottle-neck of array processors, and improve the I/O throughputs.
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Keyword(in English) Array Processor / I/O controller
Paper # VLD2007-124,CPSY2007-67,RECONF2007-70
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Committee RECONF
Conference Date 2008/1/10(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An effective data I/O mechanism utilizing FIFOs for an array processor
Sub Title (in English)
Keyword(1) Array Processor
Keyword(2) I/O controller
1st Author's Name Yuusuke NOMOTO
1st Author's Affiliation Graduate School of Computer Science and Engineering, The University of Aizu()
2nd Author's Name Yuka SATO
2nd Author's Affiliation Graduate School of Computer Science and Engineering, The University of Aizu
3rd Author's Name Toshiaki MIYAZAKI
3rd Author's Affiliation Graduate School of Computer Science and Engineering, The University of Aizu
Date 2008-01-17
Paper # VLD2007-124,CPSY2007-67,RECONF2007-70
Volume (vol) vol.107
Number (no) 419
Page pp.pp.-
#Pages 6
Date of Issue