Presentation 2008-01-16
A Method of Design and Update for An Address Generator Using a Hybrid Method
Hiroki NAKAHARA, Tsutomu SASAO, Munehiro MATSUURA,
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Abstract(in English) An address table relates k different registered vectors to the indices from 1 to κ. An address generation function represents the address table. This paper presents a realization of an address generation function with a hybrid method using a hash memory and a look-up table(LUT) cascade. The amount of hardware of the hybrid method is shown. Also, an update method for registered vectors is presented. We compared three different realizations: the hybrid method, CAMs produced by the Xilinx Core Generator, and the multiple LUT cascades. Experimental results show that the area for hybrid method is only 8 to 12% of the area for Xilinx CAMs, and is 35% of area for the multiple LUT cascades. Although our update method is complicated, the hybrid method requires smaller area and faster than conventional methods.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) CAM / LUT cascade
Paper # VLD2007-117,CPSY2007-60,RECONF2007-63
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Committee RECONF
Conference Date 2008/1/9(1days)
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Registration To Reconfigurable Systems (RECONF)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Method of Design and Update for An Address Generator Using a Hybrid Method
Sub Title (in English)
Keyword(1) CAM
Keyword(2) LUT cascade
1st Author's Name Hiroki NAKAHARA
1st Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology()
2nd Author's Name Tsutomu SASAO
2nd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
3rd Author's Name Munehiro MATSUURA
3rd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
Date 2008-01-16
Paper # VLD2007-117,CPSY2007-60,RECONF2007-63
Volume (vol) vol.107
Number (no) 418
Page pp.pp.-
#Pages 6
Date of Issue