Presentation | 2008-01-18 Novel Wafer Dicing and Chip Thinning Technologies Realizing High Chip Strength Shinya TAKYU, Tetsuya KUROSAWA, Noriko SHIMIZU, Susumu HARADA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Accompanying the rapid progress of the digital network information society, there is strong demand for high functionality and miniaturization of mobile personal digital assistance. The realization of chip thickness under 50 um is demanded. However, the chip bending force is decayed dramatically as the decay of chip thickness. Wafers are thinned by means of mechanical in-feed grinding using a grindstone containing diamond particles, so there are spiral grinding saw marks on the backside of the wafer. Dicing wafers always causes surface shipping, dicing saw mark on chip side and backside chipping. These damages remained on chip faces become source of cracks, as a result chip strength decrease. In this paper, novel wafer dicing and thinning technologies that realize the average of chip strength has increased from 253 MPa to 1903 MPa are described. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Thin chip / Backside Grinding / Dicing / Dicing Before Grinding / Cleaving |
Paper # | CPM2007-145,ICD2007-156 |
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Conference Information | |
Committee | ICD |
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Conference Date | 2008/1/10(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Novel Wafer Dicing and Chip Thinning Technologies Realizing High Chip Strength |
Sub Title (in English) | |
Keyword(1) | Thin chip |
Keyword(2) | Backside Grinding |
Keyword(3) | Dicing |
Keyword(4) | Dicing Before Grinding |
Keyword(5) | Cleaving |
1st Author's Name | Shinya TAKYU |
1st Author's Affiliation | Toshiba Corporation Semiconductor Company() |
2nd Author's Name | Tetsuya KUROSAWA |
2nd Author's Affiliation | Toshiba Corporation Semiconductor Company |
3rd Author's Name | Noriko SHIMIZU |
3rd Author's Affiliation | Toshiba Corporation Semiconductor Company |
4th Author's Name | Susumu HARADA |
4th Author's Affiliation | Toshiba Corporation Semiconductor Company |
Date | 2008-01-18 |
Paper # | CPM2007-145,ICD2007-156 |
Volume (vol) | vol.107 |
Number (no) | 426 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |