Presentation | 2008-01-17 Integrated evaluation of on-chip power supply noise and off-chip electromagnetic noise of digital LSI Yuki TAKAHASHI, Kouji ICHIKAWA, Makoto NAGATA, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Power Supply noise waveform are acquired in a voltage domain by on-chip monitor at resolution of 0.3ns / 1.2mV, in a digital test circuit consisting of 0.18μm CMOS standard logic cells. Concurrently magnetic field variation on a printed circuit board (PCB) due to power supply current of the test circuit is measured by an off-chip magnetic probing technique. An equivalent circuit model that unifies on- and off- chip impedance network of the entire test setup for EMI analysis is used for calculating the on-chip voltage-mode power supply noise from the off-chip magnetic field measurements. We have confirmed exellent consistency in frequency components of power supply noise up to 300MHz among those derived by the on-chip direct sensing and the off-chip magnetic probing techniques. These results not only validate thee state-of-the art EMI analysis methodology but also promise its connectivity with on-chip power supply integrity analysis at the integrated circuit level, for the first time in both technical fields. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | large scale integration / electro magnetic interference / printed circuit board / signal integrity / power supply integrity / integrated analysis |
Paper # | CPM2007-129,ICD2007-140 |
Date of Issue |
Conference Information | |
Committee | ICD |
---|---|
Conference Date | 2008/1/10(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Integrated evaluation of on-chip power supply noise and off-chip electromagnetic noise of digital LSI |
Sub Title (in English) | |
Keyword(1) | large scale integration |
Keyword(2) | electro magnetic interference |
Keyword(3) | printed circuit board |
Keyword(4) | signal integrity |
Keyword(5) | power supply integrity |
Keyword(6) | integrated analysis |
1st Author's Name | Yuki TAKAHASHI |
1st Author's Affiliation | Graduate School of Science and Technology, Kobe University() |
2nd Author's Name | Kouji ICHIKAWA |
2nd Author's Affiliation | DENSO Co., Ltd. |
3rd Author's Name | Makoto NAGATA |
3rd Author's Affiliation | Department of Computer and Systems Engineering, Kobe University |
Date | 2008-01-17 |
Paper # | CPM2007-129,ICD2007-140 |
Volume (vol) | vol.107 |
Number (no) | 426 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |