Presentation 2008-01-18
Survey of Analysing Techniques for On-chip Power Distribution Network
Takashi SATO,
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Abstract(in English) Primary techniques and recent trends in power distribution network (PDN) analysis are reviewed in this paper. Quality of the PDN in an LSI is critically important because it determines performance and stability of the LSI. However, verification of the PDN is one of the most time and memory demanding jobs in LSI designs, making efficient PDN design a difficult task. Targeting to realize the optimal PDN design, various analyzing methodologies have been proposed. Understanding how the PDN analysis is conducted helps designers conceive better ideas for efficient PDN improvement.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Power distribution network / supply voltage fluctuation / power integrity / nodal analysis / modified nodal analysis / circuit reduction
Paper # CPM2007-140,ICD2007-151
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Committee CPM
Conference Date 2008/1/10(1days)
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Registration To Component Parts and Materials (CPM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Survey of Analysing Techniques for On-chip Power Distribution Network
Sub Title (in English)
Keyword(1) Power distribution network
Keyword(2) supply voltage fluctuation
Keyword(3) power integrity
Keyword(4) nodal analysis
Keyword(5) modified nodal analysis
Keyword(6) circuit reduction
1st Author's Name Takashi SATO
1st Author's Affiliation Integrated research institute, Tokyo Institute of Technology()
Date 2008-01-18
Paper # CPM2007-140,ICD2007-151
Volume (vol) vol.107
Number (no) 425
Page pp.pp.-
#Pages 6
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