| Presentation | 2008-01-25 Access Time Measurement of Josephson/CMOS Hybrid Memories using SFQ Time-to-Digital Converter Nobuaki KAWAI, Yuji OKAMOTO, Hyunjoo JIN, Yuki YAMANASHI, Nobuyuki YOSHIKAWA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have been developing a Josephson/CMOS hybrid memory, which enables the sub-nanosecond access time to overcome a memory bottleneck in RSFQ digital systems. In our previous study, we obtained the access time of a few nanoseconds, which is much larger than the value evaluated from the simulation using our low-temperature CMOS device model. We consider that deterioration of the access time is due to the parasitic capacitance at the bonding pad of the Josephson chip. In this study, we measured the access time using the Josephson chip with reduced parasitic capacitance. We have obtained the access time of about 1.2ns in the 16kb hybrid memory system, which agrees well with the simulation results. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Superconducting integrated circuits / SFQ circuits / Hybrid memory / Access time / Parasitic capacitance |
| Paper # | SCE2007-33 |
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| Conference Information | |
| Committee | SCE |
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| Conference Date | 2008/1/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Superconductive Electronics (SCE) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Access Time Measurement of Josephson/CMOS Hybrid Memories using SFQ Time-to-Digital Converter |
| Sub Title (in English) | |
| Keyword(1) | Superconducting integrated circuits |
| Keyword(2) | SFQ circuits |
| Keyword(3) | Hybrid memory |
| Keyword(4) | Access time |
| Keyword(5) | Parasitic capacitance |
| 1st Author's Name | Nobuaki KAWAI |
| 1st Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University() |
| 2nd Author's Name | Yuji OKAMOTO |
| 2nd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 3rd Author's Name | Hyunjoo JIN |
| 3rd Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 4th Author's Name | Yuki YAMANASHI |
| 4th Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| 5th Author's Name | Nobuyuki YOSHIKAWA |
| 5th Author's Affiliation | Department of Electrical and Computer Engineering, Yokohama National University |
| Date | 2008-01-25 |
| Paper # | SCE2007-33 |
| Volume (vol) | vol.107 |
| Number (no) | 458 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |