| 講演名 | 2008-01-25 FFT with Reduced Complexity and Its Application to a CORDIC-Based Reconfigurable Systolic Array , |
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| PDFダウンロードページ |  PDFダウンロードページへ |
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| 抄録(英) | This paper presents a new method by which FFT/IFFT can be implemented on a CORDIC-based processor. A radix-2 FFT is considered, where in contrast to conventional method of implementing FFT on purely CORDIC-based processors, the proposed method produces FFT results without performing trivial sign reversal operation. Therefore, any additional overhead that arises from sign reversal in the conventional methods can be avoided. With an eight-point IFFT as an example, it is shown that the proposed method reduces by 12.5% total number of CORDIC resources that are utilized. In addition, the proposed concept was implemented on CORSAEngine, which is a reconfigurable CORDIC-based processor that has recently been developed by NEC Corporation. The implementation that was based on a 576-point IDFT showed that in comparison to conventional approach of implementing CORDIC-based IDFT, the proposed method increases throughput by a factor of 20%. |
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| キーワード(英) | FFT / IFFT / CORDIC / CORSAEngine |
| 資料番号 | SR2007-74 |
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| 研究会 | SR |
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| 開催期間 | 2008/1/17(から1日開催) |
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| 申込み研究会 | Software Radio(SR) |
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| 本文の言語 | ENG |
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| タイトル（英） | FFT with Reduced Complexity and Its Application to a CORDIC-Based Reconfigurable Systolic Array |
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| キーワード(1)（和/英） | / FFT |
| 第 1 著者 氏名（和/英） | / James OKELLO |
| 第 1 著者 所属（和/英） | System IP Core Research Laboratories, NEC Corporation |
| 発表年月日 | 2008-01-25 |
| 資料番号 | SR2007-74 |
| 巻番号（vol） | vol.107 |
| 号番号（no） | 452 |
| ページ範囲 | pp.- |
| ページ数 | 6 |
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