Presentation 2008-01-25
On Shielding Vertical Interconnections for High-Speed Multilayer Boards
Taras KUSHTA, Takashi HARADA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Comparative analysis of two types of shielding vertical interconnections formed by signal and ground vias in a multilayer board will be presented in the frequency band up to 20GHz. In the first type, the clearance hole for each ground via is used as a way to pass a power supply layer or a ground layer. The second type comprises an isolating slot around all ground vias for providing their isolation from the power supply layer or the ground layer. For testing both types of shield vertical interconnections, the parasitic wave effect is artificially created by an in-board resonator formed by conductor planes and via fences connected to these conductor planes.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Electromagnetic Interference / Vias / Multilayer Boards / Board Resonance / Shielding
Paper # EMCJ2007-109
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Conference Information
Committee EMCJ
Conference Date 2008/1/18(1days)
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Paper Information
Registration To Electromagnetic Compatibility (EMCJ)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) On Shielding Vertical Interconnections for High-Speed Multilayer Boards
Sub Title (in English)
Keyword(1) Electromagnetic Interference
Keyword(2) Vias
Keyword(3) Multilayer Boards
Keyword(4) Board Resonance
Keyword(5) Shielding
1st Author's Name Taras KUSHTA
1st Author's Affiliation System Jisso Research Laboratories, NEC Corporation()
2nd Author's Name Takashi HARADA
2nd Author's Affiliation System Jisso Research Laboratories, NEC Corporation
Date 2008-01-25
Paper # EMCJ2007-109
Volume (vol) vol.107
Number (no) 456
Page pp.pp.-
#Pages 6
Date of Issue