| Presentation | 2007-11-22 Memory Assignment Method Considering Orders of Operands for Massively Parallel Fine-grained SIMD Processor Akira KOBASHI, Ittetsu TANIGUCHI, Hiroaki TANAKA, Keishi SAKANUSHI, Yoshinori TAKEUCHI, Masaharu IMAI, Kiyoshi NAKATA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, spread of data intensive multimedia applications requires high-performance in embedded systems. Massively Parallel Fine-grained SIMD Processor (MX), developed by Renesas Technology Corp., achieves high performance for digital signal processing using its high parallelism. The execution cycles of MX, however, is greatly influenced by the way of the data assigned to the internal memory banks called MTA, and the orders of operands in the code of MTA. In this paper, we propose Data Relational Hypergraph (DRH) and an optimization method for the memory assignment in MTA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MX / MTA / Combinatorial optimization / Memory assignment / Hypergraph |
| Paper # | VLD2007-104,DC2007-59 |
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| Conference Information | |
| Committee | DC |
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| Conference Date | 2007/11/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Dependable Computing (DC) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Memory Assignment Method Considering Orders of Operands for Massively Parallel Fine-grained SIMD Processor |
| Sub Title (in English) | |
| Keyword(1) | MX |
| Keyword(2) | MTA |
| Keyword(3) | Combinatorial optimization |
| Keyword(4) | Memory assignment |
| Keyword(5) | Hypergraph |
| 1st Author's Name | Akira KOBASHI |
| 1st Author's Affiliation | Graduate School of Information Science and Technology, Osaka University() |
| 2nd Author's Name | Ittetsu TANIGUCHI |
| 2nd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 3rd Author's Name | Hiroaki TANAKA |
| 3rd Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 4th Author's Name | Keishi SAKANUSHI |
| 4th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 5th Author's Name | Yoshinori TAKEUCHI |
| 5th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 6th Author's Name | Masaharu IMAI |
| 6th Author's Affiliation | Graduate School of Information Science and Technology, Osaka University |
| 7th Author's Name | Kiyoshi NAKATA |
| 7th Author's Affiliation | RENESAS Technology Corporation |
| Date | 2007-11-22 |
| Paper # | VLD2007-104,DC2007-59 |
| Volume (vol) | vol.107 |
| Number (no) | 339 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |