Presentation	2007-11-22 Comparison between STA and SSTA Results in Microprocessor Design Noriyuki ITO, Hiroaki KOMATSU, Hiroyuki SUGIYAMA, Naomi BIZEN, Katsumi IGUCHI, Yuji YOSHIDA,
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Abstract(in English)	Due to decreasing feature sizes, process variation influences performance. Therefore, timing design by worst-case design based on traditional timing analysis (STA) is impractical. A new statistical timing analysis is introduced. In this paper, we compared between STA and SSTA results in microprocessor design.
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Keyword(in English)	Statistical timing analysis / Microprocessor / Critical Path
Paper #	VLD2007-89,DC2007-44
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Committee	DC
Conference Date	2007/11/15(1days)
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Paper Information
Registration To	Dependable Computing (DC)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Comparison between STA and SSTA Results in Microprocessor Design
Sub Title (in English)
Keyword(1)	Statistical timing analysis
Keyword(2)	Microprocessor
Keyword(3)	Critical Path
1st Author's Name	Noriyuki ITO
1st Author's Affiliation	Fujitsu Limited()
2nd Author's Name	Hiroaki KOMATSU
2nd Author's Affiliation	Fujitsu Limited
3rd Author's Name	Hiroyuki SUGIYAMA
3rd Author's Affiliation	Fujitsu Limited
4th Author's Name	Naomi BIZEN
4th Author's Affiliation	Fujitsu Limited
5th Author's Name	Katsumi IGUCHI
5th Author's Affiliation	Fujitsu Limited
6th Author's Name	Yuji YOSHIDA
6th Author's Affiliation	Fujitsu Limited
Date	2007-11-22
Paper #	VLD2007-89,DC2007-44
Volume (vol)	vol.107
Number (no)	339
Page	pp.pp.-
#Pages	6
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