Presentation | 2007-11-21 A design method for easily testable multipliers adaptable to various structures of partial product addition Nobutaka KITO, Naofumi TAKAGI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose a design method for easily testable multipliers. We construct partial product adders of a multiplier with three types of adder blocks. Various combinations of adder blocks lead to various structures of partial product addition for multipliers. A partial product generator and a final adder are also shown. We can construct multipliers with them adaptable to various structures of partial product addition. These multipliers can be tested with 14 test patterns with respect to cell fault model irrespective of its bit width. They require 6 additional input terminals. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | design for testability / C-testability / tree multiplier / array multiplier |
Paper # | VLD2007-83,DC2007-38 |
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Committee | DC |
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Conference Date | 2007/11/14(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A design method for easily testable multipliers adaptable to various structures of partial product addition |
Sub Title (in English) | |
Keyword(1) | design for testability |
Keyword(2) | C-testability |
Keyword(3) | tree multiplier |
Keyword(4) | array multiplier |
1st Author's Name | Nobutaka KITO |
1st Author's Affiliation | Graduate School of Information Science, Nagoya University() |
2nd Author's Name | Naofumi TAKAGI |
2nd Author's Affiliation | Graduate School of Information Science, Nagoya University |
Date | 2007-11-21 |
Paper # | VLD2007-83,DC2007-38 |
Volume (vol) | vol.107 |
Number (no) | 338 |
Page | pp.pp.- |
#Pages | 6 |
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