Presentation | 2007-11-20 Initial Evaluation of FIR Filter Based on Digit-Serial Computation Yuhki YAMABE, Kazuya TANIGAWA, Tetsuo HIRONAKA, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Increasing the filter-length and bit-width of the FIR filter designed using the conventional parallel operation units, will experience a rapid increase in hardware resources. Therefore, we introduce digit-serial operation units on implementing a FIR filter, as a method to implement a high precision FIR with a long filter-length. With the digit-serial operation units, we can keep the required hardware resources of the FIR filter small. In this paper, we evaluated the difference of the FIR filter using the bit-serial operation units between the conventional one as initial evaluation one. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Digit-Serial / Bit-Serial / FIR Filter |
Paper # | VLD2007-81,DC2007-36 |
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Committee | DC |
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Conference Date | 2007/11/13(1days) |
Place (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Initial Evaluation of FIR Filter Based on Digit-Serial Computation |
Sub Title (in English) | |
Keyword(1) | Digit-Serial |
Keyword(2) | Bit-Serial |
Keyword(3) | FIR Filter |
1st Author's Name | Yuhki YAMABE |
1st Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University() |
2nd Author's Name | Kazuya TANIGAWA |
2nd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
3rd Author's Name | Tetsuo HIRONAKA |
3rd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
Date | 2007-11-20 |
Paper # | VLD2007-81,DC2007-36 |
Volume (vol) | vol.107 |
Number (no) | 337 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |