Presentation 2007-11-20
Proposal of domino-RSL circuit which is resistant to Differential Power Analysis attack on cryptographic circuit
Yoshinobu TOYODA, Kenta KIDO, Yoshiaki SHITABAYASHI, Takeshi FUJINO,
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Abstract(in English) Countermeasures against Side Channel Attack are necessary to achieve cryptographic circuit that has tamper resistance. Many countermeasures, especially against DPA (Differential Power Analysis), are proposed because DPA is the most effective attack to estimate cipher key. RSL (Random Switching Logic) method that makes transition probability at each gate 1/2 using random value is proposed as a countermeasure at primitive gate level. The method is effective against DPA, but requires enable signal that controls drive timing at each gate to achieve hazard-free circuits. Therefore, the circuit becomes complex. In this paper, we propose domino-RSL circuit that achieves operation similar to RSL with the domino logic. The circuit doesn't require enable signal because domino logic is hazard-free. We evaluated our method about security against DPA and area of circuit using multiplier in Galois field.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Side Channel Attack / DPA / RSL / domino logic / Galois field
Paper # VLD2007-77,DC2007-32
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Committee DC
Conference Date 2007/11/13(1days)
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Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Proposal of domino-RSL circuit which is resistant to Differential Power Analysis attack on cryptographic circuit
Sub Title (in English)
Keyword(1) Side Channel Attack
Keyword(2) DPA
Keyword(3) RSL
Keyword(4) domino logic
Keyword(5) Galois field
1st Author's Name Yoshinobu TOYODA
1st Author's Affiliation Graduate school of Science and Engineering, Ritsumeikan University()
2nd Author's Name Kenta KIDO
2nd Author's Affiliation Faculty of Science and Engineering, Ritsumeikan University
3rd Author's Name Yoshiaki SHITABAYASHI
3rd Author's Affiliation Faculty of Science and Engineering, Ritsumeikan University
4th Author's Name Takeshi FUJINO
4th Author's Affiliation Faculty of Science and Engineering, Ritsumeikan University
Date 2007-11-20
Paper # VLD2007-77,DC2007-32
Volume (vol) vol.107
Number (no) 337
Page pp.pp.-
#Pages 6
Date of Issue