Presentation 2007-11-20
A Transition Delay Test Generation Method for Capture Power Reduction during At-Speed Scan Testing
Tomoaki FUKUZAWA, Kohei MIYASE, Yuta YAMATO, Hiroshi FURUKAWA, Xiaoqing WEN, Seiji KAJIHARA,
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Abstract(in English) High power dissipation can occur when a response to the test vector is captured by flip-flops in at-speed scan testing, resulting in excessive IR drop. Excessive IR drop may cause larger gate delays which may cause good chips to fail tests. As a result, significant capture-induced yield loss may occur in the deep submicron era. This paper addresses this serious problem with a new transition delay test generation method, featuring a unique algorithm that deterministically generates test cubes not only for fault detection but also for capture power reduction. In general, the number of test patterns tends to increase in low power testing, but the new method achieves capture power reduction with less test set inflation. Experimental results show its effectiveness.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Low Capture Power / ATPG / X-filling / At-speed scan testing
Paper # VLD2007-71,DC2007-26
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Committee DC
Conference Date 2007/11/13(1days)
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Paper Information
Registration To Dependable Computing (DC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Transition Delay Test Generation Method for Capture Power Reduction during At-Speed Scan Testing
Sub Title (in English)
Keyword(1) Low Capture Power
Keyword(2) ATPG
Keyword(3) X-filling
Keyword(4) At-speed scan testing
1st Author's Name Tomoaki FUKUZAWA
1st Author's Affiliation Dept of CSE, Kyushu Institute of Technology()
2nd Author's Name Kohei MIYASE
2nd Author's Affiliation Dept of CSE, Kyushu Institute of Technology
3rd Author's Name Yuta YAMATO
3rd Author's Affiliation Dept of CSE, Kyushu Institute of Technology
4th Author's Name Hiroshi FURUKAWA
4th Author's Affiliation Dept of CSE, Kyushu Institute of Technology
5th Author's Name Xiaoqing WEN
5th Author's Affiliation Dept of CSE, Kyushu Institute of Technology
6th Author's Name Seiji KAJIHARA
6th Author's Affiliation Dept of CSE, Kyushu Institute of Technology
Date 2007-11-20
Paper # VLD2007-71,DC2007-26
Volume (vol) vol.107
Number (no) 337
Page pp.pp.-
#Pages 6
Date of Issue