Presentation 2007-11-21
Design of Low Energy Array Multipliers by Reducing Signal Transitions in Partial Product Accumulators
Hirotaka KAWASHIMA, Kazuhiro NAKAMURA, Naofumi TAKAGI, Kazuyoshi TAKAGI,
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Abstract(in English) We propose a method to reduce energy consumption of array multipliers by reducing the number of signal transitions. In CMOS circuits, power consumption is caused by signal transitions. The number of meaningful signal transitions for a operation is one. Signal transitions on partial product accumulator in multipliers cause many meaningless signal transitions and consume much energy. We reduce the number of meaningless signal transitions by fixing signal on operation process. Simulation results show that 32bit array multiplier using the method consumes 33% smaller energy. We also focus on the order of fixing signals to reduce the energy consumption, and the energy consumption of the multiplier is 20% smaller.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) low energy consumption / array multiplier / signal transtion
Paper # VLD2007-87,DC2007-42
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Committee VLD
Conference Date 2007/11/14(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of Low Energy Array Multipliers by Reducing Signal Transitions in Partial Product Accumulators
Sub Title (in English)
Keyword(1) low energy consumption
Keyword(2) array multiplier
Keyword(3) signal transtion
1st Author's Name Hirotaka KAWASHIMA
1st Author's Affiliation Department of Information Engineering, Graduate School of Information Science, Nagoya University()
2nd Author's Name Kazuhiro NAKAMURA
2nd Author's Affiliation Department of Information Engineering, Graduate School of Information Science, Nagoya University
3rd Author's Name Naofumi TAKAGI
3rd Author's Affiliation Department of Information Engineering, Graduate School of Information Science, Nagoya University
4th Author's Name Kazuyoshi TAKAGI
4th Author's Affiliation Department of Information Engineering, Graduate School of Information Science, Nagoya University
Date 2007-11-21
Paper # VLD2007-87,DC2007-42
Volume (vol) vol.107
Number (no) 335
Page pp.pp.-
#Pages 6
Date of Issue