| Presentation | 2007-10-18 An Approach for Reducing Common-Mode Current on Electronic Control Units Using Optimization Algorithm Kohei SHINOMIYA, Hideki ASAI, Takanori UNO, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | With the progress of packaging technologies, electronic circuits are designed with smaller devices and higher clock speeds. Consequently, EMI problem became very serious. One of the main problems of EMI on electronic control units is common-mode current on the wire harness. It has been studied that common-mode current can be reduced by controlling the parasitic inductances and capacitances on PCBs adequately. However, since there are numerous combinations of parasitic inductance and capacitance values, it is difficult to verify all of the combinations. In this report, we propose a method which determines the parasitic inductance and capacitance values efficiently for reducing common-mode current using an optimization algorithm. Finally, some simulations of the example circuit are performed with the proposed method. From the simulation results, the validity of the proposed method is verified. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Reduction of EMI / Optimization Algorithm / Electronic Control Units / Common-Mode Current |
| Paper # | CAS2007-45,NLP2007-73 |
| Date of Issue |
| Conference Information | |
| Committee | NLP |
|---|---|
| Conference Date | 2007/10/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Approach for Reducing Common-Mode Current on Electronic Control Units Using Optimization Algorithm |
| Sub Title (in English) | |
| Keyword(1) | Reduction of EMI |
| Keyword(2) | Optimization Algorithm |
| Keyword(3) | Electronic Control Units |
| Keyword(4) | Common-Mode Current |
| 1st Author's Name | Kohei SHINOMIYA |
| 1st Author's Affiliation | Shizuoka University() |
| 2nd Author's Name | Hideki ASAI |
| 2nd Author's Affiliation | Shizuoka University |
| 3rd Author's Name | Takanori UNO |
| 3rd Author's Affiliation | DENSO CORPORATION |
| Date | 2007-10-18 |
| Paper # | CAS2007-45,NLP2007-73 |
| Volume (vol) | vol.107 |
| Number (no) | 266 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |