Presentation 2007-10-17
Miniaturization of a 2×2 switch cell toward realization of large-scale SFQ switches
Takahiro NAKAGAWA, Yoshihito HASHIMOTO, Yoshio KAMEDA, Shinichi YOROZU, Mutsuo HIDAKA, Kazunori MIYAHARA,
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Abstract(in English) We have been developing network switches as a potential application of single-flux-quantum (SFQ) circuits. In order to realize large-scale switches, it is necessary to reduce the area of 2×2 switches that are elemental circuits of switches. In this research, we newly designed a 2×2 switch cell as an analog circuit, instead of realizing it by combining our standard library cells. The 2×2 switch cell contains 74 junctions, occupies 160μm×200μm, and consumes 16.8μW. The area of the 2×2 switch cell was significantly reduced by 69% compared to 2×2 switch designed by our conventional method (using our standard cells). The 2×2 switch cell was designed to be directly connected with passive transmission lines (PTLs) by integrating PTL drivers and receivers in the switch cell. We confirmed proper operation of the 2×2 switch cell at 40 GHz by the on-chip test. We also designed a 4×4 cross-bar switch and an 8×8 cross-bar switch by using the 2×2 switch cells. We confirmed full operation of the 4×4 switch and the 8×8 switch. The area of the 4×4 switch and the 8×8 switch were reduced by about a half compared to switches implemented by combining standard cells.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Single flux quantum (SFQ) / Switch / Miniaturization / Passive transmission line (PTL) / Cell-based design / On-chip test
Paper # SCE2007-24
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Conference Information
Committee SCE
Conference Date 2007/10/10(1days)
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Paper Information
Registration To Superconductive Electronics (SCE)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Miniaturization of a 2×2 switch cell toward realization of large-scale SFQ switches
Sub Title (in English)
Keyword(1) Single flux quantum (SFQ)
Keyword(2) Switch
Keyword(3) Miniaturization
Keyword(4) Passive transmission line (PTL)
Keyword(5) Cell-based design
Keyword(6) On-chip test
1st Author's Name Takahiro NAKAGAWA
1st Author's Affiliation Graduate School of Information Environment, Tokyo Denki University()
2nd Author's Name Yoshihito HASHIMOTO
2nd Author's Affiliation SRL, ISTEC
3rd Author's Name Yoshio KAMEDA
3rd Author's Affiliation SRL, ISTEC
4th Author's Name Shinichi YOROZU
4th Author's Affiliation SRL, ISTEC
5th Author's Name Mutsuo HIDAKA
5th Author's Affiliation SRL, ISTEC
6th Author's Name Kazunori MIYAHARA
6th Author's Affiliation Graduate School of Information Environment, Tokyo Denki University
Date 2007-10-17
Paper # SCE2007-24
Volume (vol) vol.107
Number (no) 259
Page pp.pp.-
#Pages 6
Date of Issue