| Presentation | 2007-10-19 Performance Evaluations of Parallel Write-In and Parallel Read-Out Shared Buffer Type Optical Switches Kuniyoshi Maezawa, Masamitsu Kimura, Chugo Fujihashi, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | An optical packet switch is regarded as a high speed and large capacity hopeful switch for advanced future networks. Conventionally there is a tendency that an output buffer type switch is used for optical packet switches because of simplicity. However, a shared buffer type switch has a large possibility for achievement of high effective switching systems. The purposes of this paper to suggest a parallel write-in and parallel read-out structure for an all optical shared buffer type switch for a slotted variable size packet. As a switching architecture, λMPLS is used, and a buffer based on a NOLM is configured. One billion time slot simulations evaluate performances of the switching systems, and it is demonstrated that the shared buffer type switch is effective more than not only an output buffer type but also an input buffer type. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Optical switch / Parallel write-in / Parallel read-out / Shared buffer type / λMPLS / Variable size packet |
| Paper # | NS2007-91 |
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| Conference Information | |
| Committee | NS |
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| Conference Date | 2007/10/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Network Systems(NS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance Evaluations of Parallel Write-In and Parallel Read-Out Shared Buffer Type Optical Switches |
| Sub Title (in English) | |
| Keyword(1) | Optical switch |
| Keyword(2) | Parallel write-in |
| Keyword(3) | Parallel read-out |
| Keyword(4) | Shared buffer type |
| Keyword(5) | λMPLS |
| Keyword(6) | Variable size packet |
| 1st Author's Name | Kuniyoshi Maezawa |
| 1st Author's Affiliation | Faculty of Engineering, Tokyo Polytechnic University() |
| 2nd Author's Name | Masamitsu Kimura |
| 2nd Author's Affiliation | Faculty of Engineering, Tokyo Polytechnic University |
| 3rd Author's Name | Chugo Fujihashi |
| 3rd Author's Affiliation | Faculty of Engineering, Tokyo Polytechnic University |
| Date | 2007-10-19 |
| Paper # | NS2007-91 |
| Volume (vol) | vol.107 |
| Number (no) | 261 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |