| Presentation | 2007-10-26 Performance, Power, and Dependability Trade-off on Multiple Clusterd Core Processors Toshinori SATO, Toshimasa FUNAKI, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | As deep submicron technologies are advanced, we face new challenges, such as power consumption and soft errors. A naive technique, which utilizes emerging multicore processors and relies upon thread-level redundancy to detect soft errors, is power hungry. Another technique, which relies upon instruction-level redundancy, diminishes computing performance seriously. This paper investigates the trade-off between performance, power, and dependability on a multicore processor, which is named multiple clustered core processor (MCCP). It is proposed to hybrid thread- and instruction-level redundancy in order to achieve both high power efficiency and small performance loss. Detailed simulations show that the MCCP exploiting the hybrid technique improves power efficiency in energy-delay product by 13% when it compares with the one exploiting the naive thread-level technique. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Power consumption / dependability / multicore processors / trade-off design / soft errors |
| Paper # | CPSY2007-31 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2007/10/18(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance, Power, and Dependability Trade-off on Multiple Clusterd Core Processors |
| Sub Title (in English) | |
| Keyword(1) | Power consumption |
| Keyword(2) | dependability |
| Keyword(3) | multicore processors |
| Keyword(4) | trade-off design |
| Keyword(5) | soft errors |
| 1st Author's Name | Toshinori SATO |
| 1st Author's Affiliation | System LSI Research Center, Kyushu University() |
| 2nd Author's Name | Toshimasa FUNAKI |
| 2nd Author's Affiliation | Graduate School of Computer Science and System Engineering, Kyushu Institute of Technology |
| Date | 2007-10-26 |
| Paper # | CPSY2007-31 |
| Volume (vol) | vol.107 |
| Number (no) | 276 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |