| Presentation | 2007-09-21 Performance Evaluation of Dynamic-Reconfigurable Processor MuCCRA-1 with various applications Adpu PARIMALA, Yohei HASEGAWA, Vasutan TANBUNHENG, Hideharu AMANO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Although dynamically reconfigurable processors have been claimed that they are area efficient compared with FPGA, and flexible compared with ASIC with reasonable increasing of cost, the quantitative comparison has not well investigated. Here, three applications : DCT, Viterbi and SHA-1 are implemented on three architectures with the same CMOS technology : a dynamically reconfigurable processor MuCCRA-1, Virtex-E FPGA and ASIC on Rohm 0.18um process, and evaluated their performance, area and power consumption. For fair comparison, we used C like language (Handel-C and Black-Diamond) for design of all devices. From the evaluation, we found that the performance of MuCCRA was 2-4 times that of ASIC, but 4-10 times power consumption and area. Compared with FPGA, the performance of MuCCRA-1 is 2.5-8 times, and the area is depending on applications. The power consumption of FPGA is 2.5-8 times that of MuCCRA-1. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Dynamically Reconfigurable Processor / FPGA / ASIC / Evaluation |
| Paper # | RECONF2007-28 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2007/9/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Performance Evaluation of Dynamic-Reconfigurable Processor MuCCRA-1 with various applications |
| Sub Title (in English) | |
| Keyword(1) | Dynamically Reconfigurable Processor |
| Keyword(2) | FPGA |
| Keyword(3) | ASIC |
| Keyword(4) | Evaluation |
| 1st Author's Name | Adpu PARIMALA |
| 1st Author's Affiliation | Department of Information and Computer Science, Keio University() |
| 2nd Author's Name | Yohei HASEGAWA |
| 2nd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 3rd Author's Name | Vasutan TANBUNHENG |
| 3rd Author's Affiliation | Department of Information and Computer Science, Keio University |
| 4th Author's Name | Hideharu AMANO |
| 4th Author's Affiliation | Department of Information and Computer Science, Keio University |
| Date | 2007-09-21 |
| Paper # | RECONF2007-28 |
| Volume (vol) | vol.107 |
| Number (no) | 225 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |