| Presentation | 2007-09-20 Reconfigurable Architecture for Car Tuners Makoto OZONE, Katsunori HIRASE, Kazuhisa IIZUKA, Tatsuo HIRAMATSU, Shinji KIMURA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In car tuner LSIs, the reception processing is expected to be realized by software. Therefore, a new processor suitable for car tuner processing is requested. This paper includes details of our original reconfigurable processor based on ALU array architecture for car tuners, compiler, and a prototype of a broadcasting reception system with our processor. Our processor has two dimensional array of ALUs, and originally developed limited interconnections between ALUs. Our compiler converts C programs to configuration information for our processor with the original method using Data Flow Graphs. We have developed a prototype of a broadcasting reception system using our reconfigurable processor. On the prototype, we have implemented Digital Terrestrial TV "One-Seg" reception and FM radio reception, and have realized the real-time reception of both "One-Seg" and FM radio and the switching functionality of receptions by changing software. By the prototype, we have demonstrated that our processor had been effective as a processor for car tuner LSIs. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | car tuner / reconfigurable processor / ALU array / One-Seg / FM radio |
| Paper # | RECONF2007-21 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2007/9/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Reconfigurable Architecture for Car Tuners |
| Sub Title (in English) | |
| Keyword(1) | car tuner |
| Keyword(2) | reconfigurable processor |
| Keyword(3) | ALU array |
| Keyword(4) | One-Seg |
| Keyword(5) | FM radio |
| 1st Author's Name | Makoto OZONE |
| 1st Author's Affiliation | Digital Systems Research Center, SANYO Electric Co., Ltd.() |
| 2nd Author's Name | Katsunori HIRASE |
| 2nd Author's Affiliation | Digital Systems Research Center, SANYO Electric Co., Ltd. |
| 3rd Author's Name | Kazuhisa IIZUKA |
| 3rd Author's Affiliation | Digital Systems Research Center, SANYO Electric Co., Ltd. |
| 4th Author's Name | Tatsuo HIRAMATSU |
| 4th Author's Affiliation | Digital Systems Research Center, SANYO Electric Co., Ltd. |
| 5th Author's Name | Shinji KIMURA |
| 5th Author's Affiliation | Graduate School of Information, Production and Systems, Waseda University |
| Date | 2007-09-20 |
| Paper # | RECONF2007-21 |
| Volume (vol) | vol.107 |
| Number (no) | 225 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |