| Presentation | 2007-09-20 Consideration about Routing Resources for DS-HIE Architecture Tetsuya ZUYAMA, Kazuya TANIGAWA, Tetsuo HIRONAKA, |
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| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have developed DS-HIE architecture which is a dynamic reconfigurable architecture for data streaming applications. In this paper when DS-HIE architecture has one dimensional routing resources which arranged operation block in one sequence, we consider the introduction of operation units with data transmission and routing resources inside block. The operation units with data transmission are a function to reduce wiring resources by performing data transmission using operation units instead of wiring. The routing resources inside block is a function to raise percentage of used operation units by connecting outputs to other operation units in the same block. Therefore, to evaluate the trade-off, we develop a mapping simulator which maps programs to find the optimal structure and report about its hardware resources with smaller transistor counts. The number of operation blocks from the evaluation result by the mapping simulator, we found that operation units with data, transmission were useful when many blocks are used. Also, we found that routing resources inside block were useful when the numbers of the blocks used in application is small. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Dynamic Reconfigurable Architecture / Digit-serial / Routing Resources / Mapping Simulator |
| Paper # | RECONF2007-17 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2007/9/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Consideration about Routing Resources for DS-HIE Architecture |
| Sub Title (in English) | |
| Keyword(1) | Dynamic Reconfigurable Architecture |
| Keyword(2) | Digit-serial |
| Keyword(3) | Routing Resources |
| Keyword(4) | Mapping Simulator |
| 1st Author's Name | Tetsuya ZUYAMA |
| 1st Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University() |
| 2nd Author's Name | Kazuya TANIGAWA |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
| 3rd Author's Name | Tetsuo HIRONAKA |
| 3rd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
| Date | 2007-09-20 |
| Paper # | RECONF2007-17 |
| Volume (vol) | vol.107 |
| Number (no) | 225 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |