| Presentation | 2007-09-20 Implementation of Memory (MPLD) with the Ability to Work as a Reconfigurable Device Masanori YOSHIHARA, Naoki HIRAKAWA, Kazuya TANIGAWA, Tetsuo HIRONAKA, Masayuki SATO, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, FPGAs have been used as a reconfigurable device. As a problem of FPGAs, we cannot use FPGAs as one large SRAM memory effectively by combining the LUTs. To solve this problem, memory base programmable logical device (MPLD) have been proposed, which have the same functionality with FPGAs by using special placement and wiring methods for the MLUTs. In this paper, we implemented a prototype MPLD which consisted of 64 MLUTs based on two port SRAM using ROHM 0.18 μm CMOS technology. And we proved its function by implementing 32bit ripple carry counter on the MPLD. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / MPLD / SoC / memory |
| Paper # | RECONF2007-16 |
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| Conference Information | |
| Committee | RECONF |
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| Conference Date | 2007/9/13(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Reconfigurable Systems (RECONF) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Implementation of Memory (MPLD) with the Ability to Work as a Reconfigurable Device |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | MPLD |
| Keyword(3) | SoC |
| Keyword(4) | memory |
| 1st Author's Name | Masanori YOSHIHARA |
| 1st Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University() |
| 2nd Author's Name | Naoki HIRAKAWA |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
| 3rd Author's Name | Kazuya TANIGAWA |
| 3rd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
| 4th Author's Name | Tetsuo HIRONAKA |
| 4th Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
| 5th Author's Name | Masayuki SATO |
| 5th Author's Affiliation | GENESIS TECHNOLOGY INC. |
| Date | 2007-09-20 |
| Paper # | RECONF2007-16 |
| Volume (vol) | vol.107 |
| Number (no) | 225 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |