| Presentation | 2007-08-23 Dynamic Voltage & Frequency Scaling : Does it solve power wall problem in deep sub-100nm era !? Tadayosi Enomoto, Naohiko Irie, Hiroshi Okano, Shiro Sakiyama, Masakatsu Nakai, Koji Nii, Masahiro Nomura, Masayuki Mizuno, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In recent years, embedded systems requires more performance and functions to support digitized contents and networks. On the other hand, demands to reduce power consumption becomes more severe. Reducing power consumption, the essential way is to supply lower voltage, and DVFS (dynamic Voltage & Frequency Scaling) is considered to be effective. But DFVS is not major way to reduce power for general embedded systems such as cellular phones so far because of some reasons such as requirement to develop control software and limitation of lowering supply voltage to LSI. In this panel discussion, issues to employ DVFS are discussed as well as approaches to solve the issues. And we will clarify whether DVFS technology is main-stream solution to solve power wall problem in deep sub-100nm era by discussing the coverage or conditions to apply DVFS. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DFVS (Dynamic Voltage & Frequency Scaling) / low power consumption / embedded system |
| Paper # | SDM2007-154,ICD2007-82 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/8/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Dynamic Voltage & Frequency Scaling : Does it solve power wall problem in deep sub-100nm era !? |
| Sub Title (in English) | |
| Keyword(1) | DFVS (Dynamic Voltage & Frequency Scaling) |
| Keyword(2) | low power consumption |
| Keyword(3) | embedded system |
| 1st Author's Name | Tadayosi Enomoto |
| 1st Author's Affiliation | Faculty of Science & Eng. Chuo Univ.() |
| 2nd Author's Name | Naohiko Irie |
| 2nd Author's Affiliation | Central Research Lab., Hitachi Ltd. |
| 3rd Author's Name | Hiroshi Okano |
| 3rd Author's Affiliation | Fujitsu Lab. |
| 4th Author's Name | Shiro Sakiyama |
| 4th Author's Affiliation | Matsushita |
| 5th Author's Name | Masakatsu Nakai |
| 5th Author's Affiliation | Sony |
| 6th Author's Name | Koji Nii |
| 6th Author's Affiliation | Renesas |
| 7th Author's Name | Masahiro Nomura |
| 7th Author's Affiliation | NEC |
| 8th Author's Name | Masayuki Mizuno |
| 8th Author's Affiliation | Hitachi |
| Date | 2007-08-23 |
| Paper # | SDM2007-154,ICD2007-82 |
| Volume (vol) | vol.107 |
| Number (no) | 195 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |