Presentation | 2007-08-23 An Optimal Supply Voltage Determiner Circuit for Minimum Energy Operations Yoshifumi Ikenaga, Masahiro Nomura, Yoetsu Nakazawa, Yasuhiko Hagihara, |
---|---|
PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We have developed a circuit for determining an optimal supply voltage, V_ |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | DVFS / energy reduction / power gating / CMOS |
Paper # | SDM2007-151,ICD2007-79 |
Date of Issue |
Conference Information | |
Committee | ICD |
---|---|
Conference Date | 2007/8/16(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
Secretary | |
Assistant |
Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
---|---|
Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | An Optimal Supply Voltage Determiner Circuit for Minimum Energy Operations |
Sub Title (in English) | |
Keyword(1) | DVFS |
Keyword(2) | energy reduction |
Keyword(3) | power gating |
Keyword(4) | CMOS |
1st Author's Name | Yoshifumi Ikenaga |
1st Author's Affiliation | Device Platforms Research Laboratories, NEC Corporation() |
2nd Author's Name | Masahiro Nomura |
2nd Author's Affiliation | Device Platforms Research Laboratories, NEC Corporation |
3rd Author's Name | Yoetsu Nakazawa |
3rd Author's Affiliation | Device Platforms Research Laboratories, NEC Corporation |
4th Author's Name | Yasuhiko Hagihara |
4th Author's Affiliation | Device Platforms Research Laboratories, NEC Corporation |
Date | 2007-08-23 |
Paper # | SDM2007-151,ICD2007-79 |
Volume (vol) | vol.107 |
Number (no) | 195 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |