Presentation 2007-08-06
FPGA Implementation of Trellis Shaping to Control Peak Power for PSK Signals
Hiroyuki KITAGAWA, Makoto TANAHASHI, Hideki OCHIAI,
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Abstract(in English) Single-Carrier (SC) transmission is considered to be a strong candidate for uplink of 4G mobile systems due to its relatively low peak-to-average power ratio (PAR) compared to multi-carrier modulation such as OFDM. In SC systems, bandwidth efficiency can be effectively enhanced by the use of waveform shaping filter with low roll-off factor. However, as the price, the pulse-shaped signals involves nonnegligible increase of PAR, even in the case of PSK modulation. To balance both the low PAR and the high bandwidth effectively, the authers have proposed a PAR reduction techinique for single-carrier PSK modulations based on trellis shaping. In this paper, we validates the availability of the proposed techinique via the implementation of the shaping system on Field Programmable Gate Array (FPGA).
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Keyword(in English) Trellis Shaping / Single-Carrier / PSK / Peak Power / FPGA
Paper # SIP2007-66,WBS2007-15
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Committee SIP
Conference Date 2007/7/30(1days)
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Registration To Signal Processing (SIP)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) FPGA Implementation of Trellis Shaping to Control Peak Power for PSK Signals
Sub Title (in English)
Keyword(1) Trellis Shaping
Keyword(2) Single-Carrier
Keyword(3) PSK
Keyword(4) Peak Power
Keyword(5) FPGA
1st Author's Name Hiroyuki KITAGAWA
1st Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University()
2nd Author's Name Makoto TANAHASHI
2nd Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University
3rd Author's Name Hideki OCHIAI
3rd Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University
Date 2007-08-06
Paper # SIP2007-66,WBS2007-15
Volume (vol) vol.107
Number (no) 180
Page pp.pp.-
#Pages 5
Date of Issue