Presentation 2007-07-26
A 6-bit 3.5-GS/s 0.9-V 98-mW Flash A/DC in 90nm CMOS
Kazuaki DEGUCHI, Naoko SUWA, Masao ITO, Toshio KUMAMOTO, Takahiro MIKI,
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Abstract(in English) A 6-bit 3.5-GS/s flash ADC is fabricated in a 90nm CMOS process. A clamp diode with a replica biasing and an acceleration capacitor are introduced for high-speed overdrive recovery. Interpolation factor is optimized considering random offset, systematic offset and active area. The 3.5-GS/s ADC consumes 98mW with 0.9V power supply. Its SNDR is 31.18dB with Nyquist frequency input.
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Keyword(in English) A/D Converter / Flash / Averaging / Interpolation
Paper # ICD2007-42
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Committee ICD
Conference Date 2007/7/19(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 6-bit 3.5-GS/s 0.9-V 98-mW Flash A/DC in 90nm CMOS
Sub Title (in English)
Keyword(1) A/D Converter
Keyword(2) Flash
Keyword(3) Averaging
Keyword(4) Interpolation
1st Author's Name Kazuaki DEGUCHI
1st Author's Affiliation Renesas Technology Corporation()
2nd Author's Name Naoko SUWA
2nd Author's Affiliation Renesas Technology Corporation
3rd Author's Name Masao ITO
3rd Author's Affiliation Renesas Technology Corporation
4th Author's Name Toshio KUMAMOTO
4th Author's Affiliation Renesas Technology Corporation
5th Author's Name Takahiro MIKI
5th Author's Affiliation Renesas Technology Corporation
Date 2007-07-26
Paper # ICD2007-42
Volume (vol) vol.107
Number (no) 163
Page pp.pp.-
#Pages 6
Date of Issue