Presentation	2007-06-15 DC characteristics of HBT with buried SiO_2 wires in collector Shinnosuke TAKAHASHI, Tsukasa MIURA, Hiroaki YAMASHITA, Yasuyuki MIYAMOTO, Kazuhito FURUYA,
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Abstract(in English)	The HBT with buried SiO_2 in InP collector has low Base-Collector Capacitance(C_). Therefore this HBT is expected high speed operation. In equivalent circuit analysis, HBT with buried SiO_2 wires of thickness 200nm in collector exhibit two times increase in f_. SiO_2 wires of width 310nm and thickness 200nm were buried in InP Sub-collector and collector. To observe influence on epitaxial crystal growth by insertion of SiO_2 wires through leak current and current gain in HBT, HBT with buried SiO_2 wires in collector was fabricated and evaluated by DC characteristics. This HBT exhibited the almost same characteristics compared with conventional HBT.
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Keyword(in English)	HBT / MOVPE / regrowth / InP / Base-Collector capacitance / SiO_2 wires
Paper #	ED2007-37
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Conference Information
Committee	ED
Conference Date	2007/6/8(1days)
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Paper Information
Registration To	Electron Devices (ED)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	DC characteristics of HBT with buried SiO_2 wires in collector
Sub Title (in English)
Keyword(1)	HBT
Keyword(2)	MOVPE
Keyword(3)	regrowth
Keyword(4)	InP
Keyword(5)	Base-Collector capacitance
Keyword(6)	SiO_2 wires
1st Author's Name	Shinnosuke TAKAHASHI
1st Author's Affiliation	Department of Physical Electronics, Tokyo Institute of Technology()
2nd Author's Name	Tsukasa MIURA
2nd Author's Affiliation	Department of Physical Electronics, Tokyo Institute of Technology
3rd Author's Name	Hiroaki YAMASHITA
3rd Author's Affiliation	Department of Physical Electronics, Tokyo Institute of Technology
4th Author's Name	Yasuyuki MIYAMOTO
4th Author's Affiliation	Department of Physical Electronics, Tokyo Institute of Technology:CREST, Japan Science and Technology Corporation
5th Author's Name	Kazuhito FURUYA
5th Author's Affiliation	Department of Physical Electronics, Tokyo Institute of Technology:CREST, Japan Science and Technology Corporation
Date	2007-06-15
Paper #	ED2007-37
Volume (vol)	vol.107
Number (no)	95
Page	pp.pp.-
#Pages	5
Date of Issue