Presentation 2007/6/18
4-bit FinFET SONOS Flash Memory : Optimization of Structure and 3D Numerical Simulation
Yoon Kim, Jang-Gn Yur, Byung-Gook Park,
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Abstract(in English) We study the 4-bit FinFET SONOS memory which is based on double gate MOSFETs. It is operated by channel hot electron injection (CHEI)/hot hole injection (HHI) as program/erase (P/E) mechanisms. The array of the device is based on NOR-type structure. In this paper, an improved array structure of the device is proposed. The program characteristics associated with junction depth are further investigated using 3D SILVACO ATLAS simulation.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) SONOS / 4bit / NOR / Flash Memory
Paper # ED2007-103,SDM2007-108
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Committee ED
Conference Date 2007/6/18(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) 4-bit FinFET SONOS Flash Memory : Optimization of Structure and 3D Numerical Simulation
Sub Title (in English)
Keyword(1) SONOS
Keyword(2) 4bit
Keyword(3) NOR
Keyword(4) Flash Memory
1st Author's Name Yoon Kim
1st Author's Affiliation School of Electrical Engineering, Seoul National University()
2nd Author's Name Jang-Gn Yur
2nd Author's Affiliation School of Electrical Engineering, Seoul National University
3rd Author's Name Byung-Gook Park
3rd Author's Affiliation School of Electrical Engineering, Seoul National University
Date 2007/6/18
Paper # ED2007-103,SDM2007-108
Volume (vol) vol.107
Number (no) 110
Page pp.pp.-
#Pages 4
Date of Issue