Presentation 2007/6/18
Design and Simulation of Single Hole Transistor with Tunneling Barrier formed by Fixed Charge
Dong-Seup Lee, Sangwoo Kang, Joung-eob Lee, Byung-Gook Park,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) Single Hole Transistor (SHT) with tunneling barrier formed by silicon-silicon nitride fixed charge is designed and simulated by device simulator (SILVACO). Electric Barrier formed by Fixed Charge (EBFC) is more advantageous in terms of room temperature operation than electric barrier induced through electrodes. This is because the capacitance between the quantum dot and barrier forming electrodes can be eliminated, leading to considerable increase in charging energy and hence increase in operation temperature. Gate bias dependence of SHT with EBFC is characterized using a device simulator. In addition, devices with different dimensional parameters, doping concentrations and materials are utilized to optimize the tunneling barrier.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Single Hole Transistor / Fixed Charge / Quantum Dot
Paper # ED2007-83,SDM2007-88
Date of Issue

Conference Information
Committee ED
Conference Date 2007/6/18(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Electron Devices (ED)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design and Simulation of Single Hole Transistor with Tunneling Barrier formed by Fixed Charge
Sub Title (in English)
Keyword(1) Single Hole Transistor
Keyword(2) Fixed Charge
Keyword(3) Quantum Dot
1st Author's Name Dong-Seup Lee
1st Author's Affiliation Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University()
2nd Author's Name Sangwoo Kang
2nd Author's Affiliation Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University
3rd Author's Name Joung-eob Lee
3rd Author's Affiliation Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University
4th Author's Name Byung-Gook Park
4th Author's Affiliation Inter-University Semiconductor Research Center (ISRC) and School of Electrical Engineering and Computer Science, Seoul National University
Date 2007/6/18
Paper # ED2007-83,SDM2007-88
Volume (vol) vol.107
Number (no) 110
Page pp.pp.-
#Pages 4
Date of Issue