| Presentation | 2007-06-21 Filter Design for Flexible Engine/Generic ALU Array and Its Dedicated Synthesis Algorithm Masayuki HONMA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI, Makoto SATOH, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Reconfigurable processors are processors whose contexts are dynamically reconfigured while they are working. We focus on a reconfigurable processor called FE-GA (Flexible Engine/Generic ALU array) for digital media processing. Presently, FE-GA do not have its dedicated development tool. Thus, in this paper, we design FIR filters and propose an algorithm to map them onto it automatically. For given a degree and coefficients of an FIR filter, the algorithm generates a dedicated assembly code which represents a given FIR filter for FE-GA. Then an editor called FEEditor reads the generated assembly code and implements its corresponding FIR filter on FE-GA. The proposed algorithm achieves automatic mapping of FIR filters of all degrees within the range of the specification of FE-GA architecture. Furthermore, it is proved that a minimum cycle to execute FIR filtering is achieved if there is no thread switch. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | reconfigurable processor / FE-GA / FIR filter / filter mapping |
| Paper # | CAS2007-12,VLD2007-28,SIP2007-42 |
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| Conference Information | |
| Committee | SIP |
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| Conference Date | 2007/6/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Signal Processing (SIP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Filter Design for Flexible Engine/Generic ALU Array and Its Dedicated Synthesis Algorithm |
| Sub Title (in English) | |
| Keyword(1) | reconfigurable processor |
| Keyword(2) | FE-GA |
| Keyword(3) | FIR filter |
| Keyword(4) | filter mapping |
| 1st Author's Name | Masayuki HONMA |
| 1st Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University() |
| 2nd Author's Name | Nozomu TOGAWA |
| 2nd Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 3rd Author's Name | Masao YANAGISAWA |
| 3rd Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 4th Author's Name | Tatsuo OHTSUKI |
| 4th Author's Affiliation | Dept. of Computer Science and Engineering, Waseda University |
| 5th Author's Name | Makoto SATOH |
| 5th Author's Affiliation | Systems Development Laboratory, Hitachi, Ltd. |
| Date | 2007-06-21 |
| Paper # | CAS2007-12,VLD2007-28,SIP2007-42 |
| Volume (vol) | vol.107 |
| Number (no) | 104 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |