Presentation 2007-05-18
The 128-bit Blockcipher CLEFIA
Taizo SHIRAI, Kyoji SHIBUTANI, Toru AKISHITA, Shiho MORIAI, Tetsu IWATA,
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Abstract(in English) We propose a new 128-bit blockcipher CLEFIA supporting key lengths of 128, 192 and 256 bits, which is compatible with AES. CLEFIA achieves enough immunity against known attacks and flexibility for efficient implementation in both hardware and software by adopting several novel and state-of-the-art design techniques. CLEFIA achieves a good performance profile both in hardware and software. In hardware using a 0.09 μm CMOS ASIC library, about 1.60 Gbps with less than 6 Kgates, and in software, about 13 cycles/byte, 1.48 Gbps on 2.4 GHz AMD Athlon 64 processor is achieved. CLEFIA is a highly efficient blockcipher, especially in hardware.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) blockcipher / generalized Feistel structure / DSM / CLEFIA
Paper # ISEC2007-1
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Committee ISEC
Conference Date 2007/5/11(1days)
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Registration To Information Security (ISEC)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) The 128-bit Blockcipher CLEFIA
Sub Title (in English)
Keyword(1) blockcipher
Keyword(2) generalized Feistel structure
Keyword(3) DSM
Keyword(4) CLEFIA
1st Author's Name Taizo SHIRAI
1st Author's Affiliation Sony Corporation()
2nd Author's Name Kyoji SHIBUTANI
2nd Author's Affiliation Sony Corporation
3rd Author's Name Toru AKISHITA
3rd Author's Affiliation Sony Corporation
4th Author's Name Shiho MORIAI
4th Author's Affiliation Sony Corporation
5th Author's Name Tetsu IWATA
5th Author's Affiliation Nagoya University
Date 2007-05-18
Paper # ISEC2007-1
Volume (vol) vol.107
Number (no) 44
Page pp.pp.-
#Pages 9
Date of Issue