| Presentation | 2007-05-31 Improvement of Drowsy cache Ken-ichiro ISHIKAWA, |
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| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Improvement of drowsy cache which is technique of low power consumption in cache memory is proposed in this paper. Cache memory transits from normal power consumption mode to drowsy cache mode by up/down counter. L2 unified cache memory is controlled by up/down counters distinguish between data and instruction. In the result, power consumption becomes lower in L1 data cache. Cache lines in normal power consumption mode in L2 unified cache are decreased. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Cache / Low Power Consumption / Drowsy Cache |
| Paper # | ICD2007-17 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2007/5/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Improvement of Drowsy cache |
| Sub Title (in English) | |
| Keyword(1) | Cache |
| Keyword(2) | Low Power Consumption |
| Keyword(3) | Drowsy Cache |
| 1st Author's Name | Ken-ichiro ISHIKAWA |
| 1st Author's Affiliation | Faculty of Science and Engineering, Keio University() |
| Date | 2007-05-31 |
| Paper # | ICD2007-17 |
| Volume (vol) | vol.107 |
| Number (no) | 76 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |