| Presentation | 2007-05-18 FPGA Implementation of MIMO-OFDM Transmitter Using Simplified Subcarrier-Phase Hopping for PAPR Reduction Yusuke ISHIDA, Satoshi SUYAMA, Hiroshi SUZUKI, Kazuhiko FUKAWA, |
|---|---|
| PDF Download Page |  PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In MIMO-OFDM mobile communications, Subcarrier Phase Hopping-Space Division Multiplexing (SPH-SDM) randomly rotates phases of the subcarrier signals, and thus can increase frequency diversity gain due to channel coding. To reduce peak to average power ratios (PAPRs) of signals transmitted by SPH-SDM, SPH-SLM and SBPH have also been proposed. SPH-SLM selects the optimum phase shift pattern to minimize the PAPR from predetermined patterns. On the other hand, SBPH performs phase shift for time-domain signals, and thus can reduce the number of IFFTs to require high complexity. However, a hardware verification of SPH-SLM in real time has shown that much large size electronic circuit is required for SPH-SLM. Therefore, this report shows how a SBPH transmitter can be implemented on FPGA board and details its structure and performance. This transmitter has two antennas for MIMO-OFDM and follows the wireless LAN standard. It can select the optimum phase shift pattern from 16 patterns in real time. As verification of the transmitter, we demonstrate that the transmitter can drastically reduce the peak power by investigating CCDF of PAPR of the transmitted signals which the FPGA board generates. Furthermore, a computer simulation obtains an average packet error rate (PER) over a fading channel by using information on the transmitted signals which the FPGA board provides, and shows that the average PER coincides with that of a whole computer simulation using the floating point. Finally, the transmitter is compared with that of SPH-SLM in terms of PAPR reduction, circuit size, and so on. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Mobile communication / MIMO-OFDM / phase hopping / PAPR / phase pattern control / FPGA |
| Paper # | RCS2007-9 |
| Date of Issue |
| Conference Information | |
| Committee | RCS |
|---|---|
| Conference Date | 2007/5/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Radio Communication Systems (RCS) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | FPGA Implementation of MIMO-OFDM Transmitter Using Simplified Subcarrier-Phase Hopping for PAPR Reduction |
| Sub Title (in English) | |
| Keyword(1) | Mobile communication |
| Keyword(2) | MIMO-OFDM |
| Keyword(3) | phase hopping |
| Keyword(4) | PAPR |
| Keyword(5) | phase pattern control |
| Keyword(6) | FPGA |
| 1st Author's Name | Yusuke ISHIDA |
| 1st Author's Affiliation | Tokyo Institute of Technology() |
| 2nd Author's Name | Satoshi SUYAMA |
| 2nd Author's Affiliation | Tokyo Institute of Technology |
| 3rd Author's Name | Hiroshi SUZUKI |
| 3rd Author's Affiliation | Tokyo Institute of Technology |
| 4th Author's Name | Kazuhiko FUKAWA |
| 4th Author's Affiliation | Tokyo Institute of Technology |
| Date | 2007-05-18 |
| Paper # | RCS2007-9 |
| Volume (vol) | vol.107 |
| Number (no) | 38 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |