Presentation | 2007-05-17 A Discussion on a Router for embedded Programmable Logic matriX (ePLX) Naoki OKUNO, Tomonori IZUMI, Takeshi FUJINO, Takenobu IWAO, Hirofumi NAKANO, Yoshihiro OKUNO, Kazutami ARIMOTO, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose a fine-grained programmable logic architecture designed to be embedded in system-on-chips (SoCs) to enhance the performance maintaining the programmability. The ePLX consists of Look-Up-Table (LUT) arrays and hierarchial wiring resources connecting them. In order to implement a target function on the ePLX, we need a set of computer-aided design tools. This paper presents a fundamental discussion on an automated router for interconnection blocks. Since the interconnection block has hierarchial and repeated structure and there may be variations of the structure, we define an efficient format to describe the architecture of the interconnection block and provide it to our router. We construct a basic framework of routing algorithms where one net is selected and (re)routed one by one. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | System-on-Chip / Programmable Logic / Computer Aided Design / Router |
Paper # | RECONF2007-9 |
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Conference Information | |
Committee | RECONF |
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Conference Date | 2007/5/10(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Reconfigurable Systems (RECONF) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Discussion on a Router for embedded Programmable Logic matriX (ePLX) |
Sub Title (in English) | |
Keyword(1) | System-on-Chip |
Keyword(2) | Programmable Logic |
Keyword(3) | Computer Aided Design |
Keyword(4) | Router |
1st Author's Name | Naoki OKUNO |
1st Author's Affiliation | Graduate School of Science and Engineering, Ritsumeikan University() |
2nd Author's Name | Tomonori IZUMI |
2nd Author's Affiliation | Renesas Technology Corp. |
3rd Author's Name | Takeshi FUJINO |
3rd Author's Affiliation | Renesas Technology Corp. |
4th Author's Name | Takenobu IWAO |
4th Author's Affiliation | Renesas Technology Corp. |
5th Author's Name | Hirofumi NAKANO |
5th Author's Affiliation | Renesas Technology Corp. |
6th Author's Name | Yoshihiro OKUNO |
6th Author's Affiliation | Renesas Technology Corp. |
7th Author's Name | Kazutami ARIMOTO |
7th Author's Affiliation | Renesas Technology Corp. |
Date | 2007-05-17 |
Paper # | RECONF2007-9 |
Volume (vol) | vol.107 |
Number (no) | 41 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |