Presentation | 2007/4/13 Soft Error Hardened Latch Scheme for Enhanced Scan Based Delay Fault Testing Takashi IKEDA, Kazuteru NAMBA, Hideo ITO, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | In recent high-density, high-speed and low-power VLSIs, soft errors and delay faults frequently occur. Therefore, soft error hardened design and delay fault testing are essential. This paper proposes a latch scheme which has soft error tolerant capability and allows enhanced scan based delay fault testing. The proposed latch is constructed by added some extra transistors which make enhanced scan based delay fault testing possible into an existing soft error hardened latch. The proposed scheme allows not only arbitrary two-pattern testing but also detecting some stuck-at faults which is not detectable without the extra transistors. The area and time overhead of the proposed latch is to 33.3% and 40.1% larger than those of the existing soft error hardened latch respectively. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Soft Error / Delay Fault / Enhanced Scan |
Paper # | CPYS2007-1,DC2007-1 |
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Committee | DC |
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Conference Date | 2007/4/13(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | Dependable Computing (DC) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Soft Error Hardened Latch Scheme for Enhanced Scan Based Delay Fault Testing |
Sub Title (in English) | |
Keyword(1) | Soft Error |
Keyword(2) | Delay Fault |
Keyword(3) | Enhanced Scan |
1st Author's Name | Takashi IKEDA |
1st Author's Affiliation | GraduateSchool of Science and Technology, Chiba University() |
2nd Author's Name | Kazuteru NAMBA |
2nd Author's Affiliation | Graduate Scool of Advanced Integrated Science, Chiba University |
3rd Author's Name | Hideo ITO |
3rd Author's Affiliation | Graduate Scool of Advanced Integrated Science, Chiba University |
Date | 2007/4/13 |
Paper # | CPYS2007-1,DC2007-1 |
Volume (vol) | vol.107 |
Number (no) | 17 |
Page | pp.pp.- |
#Pages | 6 |
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